Built in super single ended output mode :
You don't bother if you have the both balanced and 6.3MM headphones , you can select the "S" output mode for the single ended headphone got the full power and drive ability as same as balance output mode.
Pros and cons of R-2R DAC :
1.R-2R will not convert the clock signal into the output signal.
2. R-2R is not sensitive to jitter while Delta-Sigma DA is much more sensitive to jitter.
3. The output signal is much more precise compared to Delta-Sigma DA .
1.THD today is extremely good with Sigma Delta chips; R2R ladders are good too but not as good.
2. Glitches and accuracy of the ladder resistors are very difficult to avoid and require complex technology to resolve it.
R-2R basic design in the market:
The R-2R DAC is very popular nowadays and available from DIY kits and completely up to of the shelf high-end products.
In the low range DIY market, the R-2R design is often based on old technology designed a long time ago by MSB and only includes basic R2R ladder design and do not include the wonderful correction design of the original MSB technology. This design uses data shift registers logic chips in series mode to convert the data to an analog signal. The structural R2R technology issues cannot be avoided, and performance is solely depending on the accuracy of the ladder resistors.
In the High-End of the shelf (finished products) market, the R2R design is much more complex only to reach best performance. A basic R2R ladder is simply not sufficient enough to achieve good performance and sound quality! Some manufacturers are using shift registers design. A less complex and less performing design based on traditional logic chips working in serial mode to correct the ladder.
A far better design switches resistors in parallel mode. An ultra-fast FPGA controls and corrects the R2R ladder. The parallel design mode controls every bit respectively and therefore achieve unprecedented performance. (In parallel mode only 1 clock cycle is needed to output all data; serial design mode needs at minimum 8 up to 24 clock cycles) The parallel design is much more complicated. Once designed properly it can correct every bit of the ladder. Photo below shows a design with such FPGA, can correct the unavoidable imperfections of the R2R ladder caused by tolerance of resistors, glitches to achieve best performance.
Accuracy of the ladder resistors (tolerance):
Many people believe the tolerance of the resistors in the ladder is most important to reach best performance. Nowadays 24 bit resolution is standard. What tolerance is needed to achieve 24 bit resolution?
When we look at 16 bit the tolerance of 1/66536, 0.1% (1/1000) is far not enough, even a tolerance of 0.01% (1/10000), the best tolerance available in the world today, still cannot handle 16 bit request correctly; we are not even calculating 24 bit here!
The tolerance of the resistor will never solve Imperfections of a ladder. This would require resistors with a tolerance of 0.00001% and can handle 24 bit resolution. This is only in theory because the discreteness of the switch logic chips have already too much internal impedance and will destroy the impossible tolerance of a resistor.
The solution is to correct the ladder and not only depend on the tolerance of resistors. It’s a combination of both: Ultra-low tolerance resistors controlled by a correction technology using very high speed FPGA are applicable in in our design.
Importunacy of the FPGA :
FPGA stands for Programmable Array Logic.
Nowadays the FPGA is applied in a lot high end grade DACs; like the popular ROCKNA WAVEDREAM DAC.
The internal hardware design is fully controlled by complex software. A huge advantage is the fact the software in the FPGA can easily be upgraded offering new features or improve the performance. Such design is much flexible and future proof!
The FPGA is responsible for:
1. High performance SPDIF interface, replacing traditional less good performing SPDIF interface chips like DIR9001, WM8805 or AK411X,etc.
2. Full re-clocking process with FIFO design applicable on all inputs. This way the output data keeps fully synchronized with the clock signal to reject any jitter.
3. Built in 2X, 4X and 8X oversampling and digital filters and on top of this 4 different true NOS (only analog 6dB filtering) modes. To completely configure it to your liking!
Built in an excellent real balance discrete amp
The signal last stage is the analog output stages, they can much effect the whole DAC sound quality.
After d/a conversion by the R2R D/A modules the analogue signal is transported by fully discrete matched-transistor output stages.
The high speed special ACSS output stages are non-feedback and current driven design.
Special because almost all other designs need to convert the signal multiple times from and to current or voltage, resulting in less detail and less good staging.
The output stages had built in 4 pair 15W transistors for offer strong drive ability .The diamond different design can avoid switch distortion , it working as the class A but don't want large idle current . The balance drive mode can kill the noise and distortion in the end of the headphone, much improve the sound stage, background and the transparency ,ect.
0.05% tolerance volume control system
There 4 channels volume boards built in the unit for the balance volume control. They are control by digital signal but applied relaies control the resistors in analog area . The 0.1% Vishay or KOA resistors working in parallel mode to got the 0.05% tolerance .
Heavy power supplies design:
The DAC has the high quality low noise, low flux leakage, R-cores transformers to supply all digital parts and the left and right analog boards.
There are in total 11 group ultra-high speed and ultra-low noise PSUs built in and applied double stage PSUs technology for remove the power interrupt ,get much clean power supply for the digital parts .
There are two group pure class A PSUs built in for the analog amps .